Update whitespace and bullet point refs
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@@ -32,17 +32,17 @@ Generally a set bit indicates the property is asserted
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(R)
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(R)
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bits 7:4 = Major version number
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bits 7:4 = Major version number
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bits 3:0 = Minor version number
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bits 3:0 = Minor version number
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(see register 0x0E for sub minor version number)
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see nextreg 0x0E for sub minor version number
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0x02 (02) => Reset
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0x02 (02) => Reset
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(R)
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(R)
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bit 7 = 1 if the reset signal to the expansion bus and esp is asserted
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bit 7 = 1 if the reset signal to the expansion bus and esp is asserted
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bits 6:5 = Reserved
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bits 6:5 = Reserved
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bit 4 = 1 if multiface nmi was generated by an i/o trap (experimental, see nextreg 0xda)
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bit 4 = 1 if multiface nmi was generated by an i/o trap (experimental, see nextreg 0xDA)
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bit 3 = 1 if multiface nmi was generated by this nextreg
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bit 3 = 1 if multiface nmi was generated by this nextreg
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bit 2 = 1 if divmmc nmi was generated by this nextreg
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bit 2 = 1 if divmmc nmi was generated by this nextreg
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bit 1 = 1 if the last reset was a hard reset
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bit 1 = 1 if the last reset was a hard reset *
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bit 0 = 1 if the last reset was a soft reset
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bit 0 = 1 if the last reset was a soft reset *
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* Only one of bits 1:0 will be set
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* Only one of bits 1:0 will be set
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(W)
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(W)
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bit 7 = Assert and hold reset to the expansion bus and the esp wifi (hard reset = 0)
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bit 7 = Assert and hold reset to the expansion bus and the esp wifi (hard reset = 0)
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@@ -82,7 +82,8 @@ Generally a set bit indicates the property is asserted
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011 = ZX +2A/+2B/+3
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011 = ZX +2A/+2B/+3
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100 = Pentagon
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100 = Pentagon
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0x04 (04) => Config Mapping (config mode only, bootrom disabled)
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0x04 (04) => Config Mapping
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config mode only, bootrom disabled
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(W)
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(W)
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bit 7 = Reserved, must be 0
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bit 7 = Reserved, must be 0
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bits 6:0 = 16K SRAM bank mapped to 0x0000-0x3FFF (hard reset = 0)
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bits 6:0 = 16K SRAM bank mapped to 0x0000-0x3FFF (hard reset = 0)
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@@ -105,9 +106,9 @@ Joystick modes:
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101 = MD 1 (3 or 6 button joystick port 0x1F)
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101 = MD 1 (3 or 6 button joystick port 0x1F)
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110 = MD 2 (3 or 6 button joystick port 0x37)
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110 = MD 2 (3 or 6 button joystick port 0x37)
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111 = User Defined Keys Joystick
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111 = User Defined Keys Joystick
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* Joysticks can be placed in i/o mode via nextreg 0x0B.
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* Joysticks can be placed in i/o mode via nextreg 0x0B
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* Programming the user defined keys joystick is done through the ps2 keymap interface
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* Programming the user defined keys joystick is done through the ps2 keymap interface
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on nextreg 0x28, 0x29 and 0x2B:
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on nextreg 0x28, nextreg 0x29 and nextreg 0x2B:
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1. Write 128 to nextreg 0x28
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1. Write 128 to nextreg 0x28
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2. Write 0 (left joystick) or 16 (right joystick) to nextreg 0x29
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2. Write 0 (left joystick) or 16 (right joystick) to nextreg 0x29
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3. Write twelve bytes to nextreg 0x2B in order. The bytes correspond to the twelve
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3. Write twelve bytes to nextreg 0x2B in order. The bytes correspond to the twelve
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@@ -206,9 +207,10 @@ Joystick modes:
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* CTC channel 3 is currently used to drive pin 7 in clock mode. Freq = Fctc3 / 2.
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* CTC channel 3 is currently used to drive pin 7 in clock mode. Freq = Fctc3 / 2.
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** CTS_n is only active if the seleced uart is in hw flow control mode.
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** CTS_n is only active if the seleced uart is in hw flow control mode.
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0x0E (14) => Core Version (sub minor number)
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0x0E (14) => Core Version
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Sub-minor number
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(R)
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(R)
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(see register 0x01 for the major and minor version number)
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see nextreg 0x01 for the major and minor version number
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0x0F (15) => Board ID
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0x0F (15) => Board ID
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(R)
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(R)
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@@ -230,7 +232,8 @@ Joystick modes:
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bits 4:0 = Core ID 0-31 (config mode only) *
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bits 4:0 = Core ID 0-31 (config mode only) *
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* A write of an out of range core id is ignored; this is the preferred way to determine max id
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* A write of an out of range core id is ignored; this is the preferred way to determine max id
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0x11 (17) => Video Timing (writable in config mode only)
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0x11 (17) => Video Timing
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Writable in config mode only.
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(R/W)
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(R/W)
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bits 7:3 = Reserved, must be 0
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bits 7:3 = Reserved, must be 0
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bits 2:0 = Mode (VGA = 0..6, HDMI = 7)
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bits 2:0 = Mode (VGA = 0..6, HDMI = 7)
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