Update whitespace and bullet point refs

This commit is contained in:
2025-10-13 18:12:27 +01:00
parent d5253f073b
commit 1bc613dd4e

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@@ -32,17 +32,17 @@ Generally a set bit indicates the property is asserted
(R) (R)
bits 7:4 = Major version number bits 7:4 = Major version number
bits 3:0 = Minor version number bits 3:0 = Minor version number
(see register 0x0E for sub minor version number) see nextreg 0x0E for sub minor version number
0x02 (02) => Reset 0x02 (02) => Reset
(R) (R)
bit 7 = 1 if the reset signal to the expansion bus and esp is asserted bit 7 = 1 if the reset signal to the expansion bus and esp is asserted
bits 6:5 = Reserved bits 6:5 = Reserved
bit 4 = 1 if multiface nmi was generated by an i/o trap (experimental, see nextreg 0xda) bit 4 = 1 if multiface nmi was generated by an i/o trap (experimental, see nextreg 0xDA)
bit 3 = 1 if multiface nmi was generated by this nextreg bit 3 = 1 if multiface nmi was generated by this nextreg
bit 2 = 1 if divmmc nmi was generated by this nextreg bit 2 = 1 if divmmc nmi was generated by this nextreg
bit 1 = 1 if the last reset was a hard reset bit 1 = 1 if the last reset was a hard reset *
bit 0 = 1 if the last reset was a soft reset bit 0 = 1 if the last reset was a soft reset *
* Only one of bits 1:0 will be set * Only one of bits 1:0 will be set
(W) (W)
bit 7 = Assert and hold reset to the expansion bus and the esp wifi (hard reset = 0) bit 7 = Assert and hold reset to the expansion bus and the esp wifi (hard reset = 0)
@@ -82,7 +82,8 @@ Generally a set bit indicates the property is asserted
011 = ZX +2A/+2B/+3 011 = ZX +2A/+2B/+3
100 = Pentagon 100 = Pentagon
0x04 (04) => Config Mapping (config mode only, bootrom disabled) 0x04 (04) => Config Mapping
config mode only, bootrom disabled
(W) (W)
bit 7 = Reserved, must be 0 bit 7 = Reserved, must be 0
bits 6:0 = 16K SRAM bank mapped to 0x0000-0x3FFF (hard reset = 0) bits 6:0 = 16K SRAM bank mapped to 0x0000-0x3FFF (hard reset = 0)
@@ -105,9 +106,9 @@ Joystick modes:
101 = MD 1 (3 or 6 button joystick port 0x1F) 101 = MD 1 (3 or 6 button joystick port 0x1F)
110 = MD 2 (3 or 6 button joystick port 0x37) 110 = MD 2 (3 or 6 button joystick port 0x37)
111 = User Defined Keys Joystick 111 = User Defined Keys Joystick
* Joysticks can be placed in i/o mode via nextreg 0x0B. * Joysticks can be placed in i/o mode via nextreg 0x0B
* Programming the user defined keys joystick is done through the ps2 keymap interface * Programming the user defined keys joystick is done through the ps2 keymap interface
on nextreg 0x28, 0x29 and 0x2B: on nextreg 0x28, nextreg 0x29 and nextreg 0x2B:
1. Write 128 to nextreg 0x28 1. Write 128 to nextreg 0x28
2. Write 0 (left joystick) or 16 (right joystick) to nextreg 0x29 2. Write 0 (left joystick) or 16 (right joystick) to nextreg 0x29
3. Write twelve bytes to nextreg 0x2B in order. The bytes correspond to the twelve 3. Write twelve bytes to nextreg 0x2B in order. The bytes correspond to the twelve
@@ -206,9 +207,10 @@ Joystick modes:
* CTC channel 3 is currently used to drive pin 7 in clock mode. Freq = Fctc3 / 2. * CTC channel 3 is currently used to drive pin 7 in clock mode. Freq = Fctc3 / 2.
** CTS_n is only active if the seleced uart is in hw flow control mode. ** CTS_n is only active if the seleced uart is in hw flow control mode.
0x0E (14) => Core Version (sub minor number) 0x0E (14) => Core Version
Sub-minor number
(R) (R)
(see register 0x01 for the major and minor version number) see nextreg 0x01 for the major and minor version number
0x0F (15) => Board ID 0x0F (15) => Board ID
(R) (R)
@@ -230,7 +232,8 @@ Joystick modes:
bits 4:0 = Core ID 0-31 (config mode only) * bits 4:0 = Core ID 0-31 (config mode only) *
* A write of an out of range core id is ignored; this is the preferred way to determine max id * A write of an out of range core id is ignored; this is the preferred way to determine max id
0x11 (17) => Video Timing (writable in config mode only) 0x11 (17) => Video Timing
Writable in config mode only.
(R/W) (R/W)
bits 7:3 = Reserved, must be 0 bits 7:3 = Reserved, must be 0
bits 2:0 = Mode (VGA = 0..6, HDMI = 7) bits 2:0 = Mode (VGA = 0..6, HDMI = 7)